Since both AMD and Nvidia fail to demonstrate SPIR-capable OpenCL runtimes, I thought of bringing this up: if instead of PTX and GCN/RDNA ISA, one might take the platform and not the vendor route. Instead of writing multiple codegenerators, on could embed into multiple APIs outside OpenCL.
Such extensions could be exposed via the Codeplay platform, thus exposing non-host devices. Such extensions could take the clvk route to run OpenCL host (and device) code atop Vulkan, or one could change the integration header generator to emit real Vulkan code. The list of API functions required to compile/dispatch kernels, kernel args and data is fairly limited, my guess is that the bulk of the work is building the task graph which can be shared between back-ends.
Because DXIL just like SPIR is based on LLVM 3.x (3.7 and 3.2 respectively) much of existing codegen may be resused. Codeplay should already have some experience translating LLVM 3.x versions to one another from early versions of ComputeCpp back in the days. Having a DX12 back-end, one could use it in UWP contexts as well.